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Fermilab | Batavia, IL | USA

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Fermilab technology available for license: Bed-ridden boredom spurs new invention

This article appeared in Fermilab Today on July 24, 2014.

Fermilab engineer Jim Hoff has invented an electronic circuit that can guard against radiation damage. Photo: Hanae Armitage

Fermilab engineer Jim Hoff has invented an electronic circuit that can guard against radiation damage. Photo: Hanae Armitage

Fermilab engineer Jim Hoff has received patent approval on a very tiny, very clever invention that could have an impact on aerospace, agriculture and medical imaging industries.

Hoff has engineered a widely adaptable latch — an electronic circuit capable of remembering a logical state — that suppresses a commonly destructive circuit error caused by radiation.

There are two radiation-based errors that can damage a circuit: total dose and single-event upset. In the former, the entire circuit is doused in radiation and damaged; in an SEU, a single particle of radiation delivers its energy to the chip and alters a state of memory, which takes the form of 1s and 0s. Altered states of memory equate to an unintentional shift from logical 1 or logical 0 and ultimately lead to loss of data or imaging resolution. Hoff’s design is essentially a chip immunization, preemptively guarding against SEUs.

“There are a lot of applications,” Hoff said. “Anyone who needs to store data for a length of time and keep it in that same state, uncorrupted — anyone flying in a high-altitude plane, anyone using medical imaging technology — could use this.”

Past experimental data showed that, in any given total-ionizing radiation dose, the latch reduces single-event upsets by a factor of about 40. Hoff suspects that the invention’s newer configurations will yield at least two orders of magnitude in single-event upset reduction.

The invention is fondly referred to as SEUSS, which stands for single-event upset suppression system. It’s relatively inexpensive and designed to integrate easily with a multitude of circuits — all that’s needed is a compatible transistor.

Hoff’s line of work lies in chip development, and SEUSS is currently used in some Fermilab-developed chips such as FSSR, which is used in projects at Jefferson Lab, and Phoenix, which is used in the Relativistic Heavy Ion Collider at Brookhaven National Laboratory.

The idea of SEUSS was born out of post-knee-surgery, bed-ridden boredom. On strict bed rest, Hoff’s mind naturally wandered to engineering.

“As I was lying there, leg in pain, back cramping, I started playing with designs of my most recent project at work,” he said. “At one point I stopped and thought, ‘Wow, I just made a single-event upset-tolerant SR flip-flop!'”

While this isn’t the world’s first SEUSS-tolerant latch, Hoff is the first to create a single-event upset suppression system that is also a set-reset flip-flop, meaning it can take the form of almost any latch. As a flip-flop, the adaptability of the latch is enormous and far exceeds that of its pre-existing latch brethren.

“That’s what makes this a truly special latch — its incredible versatility,” says Hoff.

From a broader vantage point, the invention is exciting for more than just Fermilab employees; it’s one of Fermilab’s first big efforts in pursuing potential licensees from industry.

Cherri Schmidt, head of Fermilab’s Office of Partnerships and Technology Transfer, with the assistance of intern Miguel Marchan, has been developing the marketing plan to reach out to companies who may be interested in licensing the technology for commercial application.

“We’re excited about this one because it could really affect a large number of industries and companies,” Schmidt said. “That, to me, is what makes this invention so interesting and exciting.”

Hanae Armitage

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  • Tom Chiverton

    ECC RAM has been around for a decade or two – how is this specially different ?

  • http://www.fnal.gov Fermilab

    Tom: here’s Jim Hoff’s reply:

    ECC RAM stores extra bits. For example, it stores 9 bits when your actual data is only 8 bits wide. It then uses logic external to the storage cells to try to determine if a retrieved word has an error in it. This type of RAM is fine for ordinary circumstances (like your computer) and it even has a place in high-radiation environments (like the LHC at CERN or in, for example, a PET scanner) if you have a need for mass storage and you can tolerate a very high data failure rate. However, for most high-radiation situations – especially those when the stored information is critical to the CONTROL of the machine – you will require a more reliable means of information storage.

    To use a crude example, memory that stores the communications between a pilot and his air traffic controller doesn’t need a whole lot of error correction. ECC is fine. Errors in such data will just sound like noise to a listener. However, the settings on the autopilot are essential to the life and safety of the passengers and crew. That is control information and it must be preserved by all means possible. There we will use SEU-tolerant registers.

    Single-event upset-tolerant registers use redundancy and feedback WITHIN the storage cell itself to ensure that in the event of an upset, the storage cell itself will either ignore the upset or overcome it, retaining the data the storage cell was asked to store. Interestingly, you can make ECC RAM from SEU-tolerant cells if you need that much extra error tolerance. This has been done in several high-energy physics applications.